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* [[http://www.eecg.toronto.edu/~vaughn/challenge/challenge.html|Toronto 20]] -- venerable set of designs used for assessing placement and routing tools and architectures. Small compared to today's FPGAs and does not include memory blocks. * [[http://code.google.com/p/vtr-verilog-to-routing/|VTR 7]] -- VTR Release includes a set of larger benchmarks |
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| * [[http://www.eecg.toronto.edu/~vaughn/challenge/challenge.html|Toronto 20]] -- venerable set of designs used for assessing placement and routing tools and architectures. Small compared to today's FPGAs and does not include memory blocks. |
FPGA and Reconfigurable Computing Benchmarking
Toronto 20 -- venerable set of designs used for assessing placement and routing tools and architectures. Small compared to today's FPGAs and does not include memory blocks.
VTR 7 -- VTR Release includes a set of larger benchmarks
TITAN -- newer set of large benchmarks from Toronto
UMass RCG HDL -- collection of signal processing benchmarks
GROUNDHOG -- benchmarks for mobile applications with emphasis on power
ERCBench -- developing set of newer benchmarks for embedded applications (now taking contributions).
Send suggestions for additions and corrections to this page to benchmarking@tcfpga.org.