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International IEEE Symposium on Field-Programmable Custom Computing Machines

Best Papers

2010	Rapid RNA Folding: Analysis and Acceleration of the Zuker Recurrence	IEEE Xplore link
2010	Hardware Acceleration of Approximate Tandem Repeat Detection	IEEE Xplore link
2011	Multilevel Granularity Parallelism Synthesis on FPGAs	IEEE Xplore link
2012	Hardware Acceleration of Short Read Mapping	IEEE Xplore link
2013	Parallel Computation of Skyline Queries	IEEE Xplore link
2014	Speeding Up FPGA Placement: Parallel Algorithms and Methods	IEEE Xplore link
2015	Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs	IEEE Xplore link
2016 (long)	KAPow: A System Identification Approach to Online Per-module Power Estimation in FPGA Designs
2016 (short)	GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator

-  ⇤ ← Revision 6 as of 2015-05-06 14:42:42 → 
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  Editor: AndreDeHon
  Comment: add FcCM 2015 best paper winner (no Xplorer link, yet)
+   ← Revision 7 as of 2016-05-05 02:02:19 → ⇥
  Size: 1697
  Editor: AndreDeHon
  Comment: add 2016 best paper; try link for 2015
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-    ||2015||Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs|| ||
+    ||2015||Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs||[[http://ieeexplore.ieee.org/xpl/logn.jsp?tp=&arnumber=7160056|IEEE Xplore link]]||
    ||2016 (long)||KAPow: A System Identification Approach to Online Per-module Power Estimation in FPGA Designs ||  ||
    ||2016 (short)||GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator||  ||