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||Mr. Bob Blainey (IBM Fellow, Compiler and Next-Generation System Software)</td>||
      <td align=center><a href="
BobBlainey.pdf">slides</a></td>||
      <td><a href="fpga_2012_03_bob_blamey.m4v">Video (155MB)</a></td>||
||Dr. Steve Teig (President and CTO of Tabula)</td>||
      <td align=center><a href="SteveTeig.pdf">slides</a></td>||
      <td><a href="fpga_2012_04_steve_teig.m4v">Video (171MB)</a></td>||
||<td>
Dr. Michael Flynn (Chairman of Maxeler Technologies and
                    
Professor Emeritus at Stanford University)</td>||
      <td align=center><a href="
MichaelFlynn.pdf">slides</a></td>||
      <td><a href="
fpga_2012_05_michael_flynn.m4v">Video (176MB)</a></td>||
||Dr. Ivo Bolsens (CTO and Senior Vice-President of Xilinx)</td>||
      <td align=center><a href="
IvoBolsens.pdf">slides</a></td>||
      <td><a href="
fpga_2012_06_ivo_bolsen.m4v">Video (202MB)</a></td>||
||Mr. Shep Siegel (Founder and CTO of Atomic Rules)</td>||
      <td align=center><a href="
ShepSiegel.pdf">slides</a></td>||
      <td><a href="
fpga_2012_07_shep_siegel.m4v">Video (244MB)</a></td>||
||Prof. Peter Cheung (Head of the Department of Electrical and
                        
Electronic Engineering, Imperial College London)</td>||
      <td align=center><a href="
PeterCheung.pdf">slides</a></td>||
      <td><a href="
fpga_2012_08_peter_cheung.m4v">Video (206MB)</a></td>||
||General Questions and Discussion|| || ||
||Mr. Bob Blainey (IBM Fellow, Compiler and Next-Generation System Software)||[[attachment:BobBlainey.pdf]] ||[[attachment:fpga_2012_03_bob_blamey.m4v]] ||
||Dr. Steve Teig (President and CTO of Tabula)</td>||[[attachment:SteveTeig.pdf]] ||[[attachment:fpga_2012_04_steve_teig.m4v]] ||
||Dr. Michael Flynn (Chairman of Maxeler Technologies and Professor Emeritus at Stanford University)||[[attachment:MichaelFlynn.pdf]] ||[[attachment:fpga_2012_05_michael_flynn.m4v]] ||
||Dr. Ivo Bolsens (CTO and Senior Vice-President of Xilinx)||[[attachment:IvoBolsens.pdf]] ||[[attachment:fpga_2012_06_ivo_bolsen.m4v]] ||
||Mr. Shep Siegel (Founder and CTO of Atomic Rules)||[[attachment:ShepSiegel.pdf]] ||[[attachment:fpga_2012_07_shep_siegel.m4v]] ||
||Prof. Peter Cheung (Head of the Department of Electrical and Electronic Engineering, Imperial College London)||[[attachment:PeterCheung.pdf]] ||[[attachment:fpga_2012_08_peter_cheung.m4v]] ||
||General Questions and Discussion|| ||  [[attachment:fpga_2012_09_panel_discussion.m4v]] ||

FPGA2012 Pre-Conference Workshop: FPGAs in 2032: Challenges and Opportunities in the next 20 years

FPGAs in 2032: Challenges and Opportunities in the next 20 years

FPGA2012 Pre-Conference Workshop

February 22, 2012, Monetery, CA

Chairs: Vaughn Betz (University of Toronto) and Lesley Shannon (Simon Fraser University)

Abstract: This year marks the 20th anniversary of the FPGA Symposium, so itis fitting that this workshop will look forward to the changes that the next 20 years are likely to bring to programmable systems. A panel of visionaries from industry and academia will present their thoughts on major research areas, challenges and opportunities that will emerge over the coming two decades. Questions abound, from what the software flow in 2032 will be, to what architectures will suit chips with 100 billion transistors, and what the fabrication technology will be.

program

Speaker or Segment

Slides

Video

Introduction by Vaugn Betz (University of Toronto)

workshop_overview.pdf

fpga_2012_01_intro.m4v

Dr. Misha Burich (CTO and Senior Vice-President of R & D of Altera)

MishaBurich.pdf

fpga_2012_02_misha_burich.m4v

Mr. Bob Blainey (IBM Fellow, Compiler and Next-Generation System Software)

BobBlainey.pdf

fpga_2012_03_bob_blamey.m4v

Dr. Steve Teig (President and CTO of Tabula)</td>

SteveTeig.pdf

fpga_2012_04_steve_teig.m4v

Dr. Michael Flynn (Chairman of Maxeler Technologies and Professor Emeritus at Stanford University)

MichaelFlynn.pdf

fpga_2012_05_michael_flynn.m4v

Dr. Ivo Bolsens (CTO and Senior Vice-President of Xilinx)

IvoBolsens.pdf

fpga_2012_06_ivo_bolsen.m4v

Mr. Shep Siegel (Founder and CTO of Atomic Rules)

ShepSiegel.pdf

fpga_2012_07_shep_siegel.m4v

Prof. Peter Cheung (Head of the Department of Electrical and Electronic Engineering, Imperial College London)

PeterCheung.pdf

fpga_2012_08_peter_cheung.m4v

General Questions and Discussion

fpga_2012_09_panel_discussion.m4v

FPGA2012_workshop (last edited 2021-01-10 22:40:11 by AndreDeHon)