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| * [[attachment:seesion3_3.pdf|Memory Block Based Scan-BIST Architecture for Application-Dependent FPGA Testing]] | * [[attachment:session3_3.pdf|Memory Block Based Scan-BIST Architecture for Application-Dependent FPGA Testing]] * FPGA-based Biophysically-Meaningful Modeling of Olivocerebellar Neurons * Square-Rich Fixed Point Polynomial Evaluation on FPGAs * [[attachment:session5_1.pptx|Soft Vector Processors with Streaming Pipelines]] * MORP: Makespan Optimization for Processors with an Embedded Reconfigurable Fabric * [[attachment:session5_3.pdf|OmpSs@Zynq All-Programmable SoC Ecosystem]] * A FPGA Prototype Design Emphasis on Low Power Technique |
2014 International Symposium on Field-Programmable Gate Arrays
Talk Slides
These are slides from talks given at the 2014 ISFPGA Conference.
Fast and Effective Placement and Routing Directed High-Level Synthesis for FPGAs
Optimizing Effective Interconnect Capacitance for FPGA Power Reduction
- Modular Multi-ported SRAM-based Memories
- Revisiting And-Inverter Cones
Dynamic Voltage & Frequency Scaling with Online Slack Measurement
CAD and Routing Architecture for Interposer-Based Multi-FPGA Systems
Memory Block Based Scan-BIST Architecture for Application-Dependent FPGA Testing
- FPGA-based Biophysically-Meaningful Modeling of Olivocerebellar Neurons
- Square-Rich Fixed Point Polynomial Evaluation on FPGAs
- MORP: Makespan Optimization for Processors with an Embedded Reconfigurable Fabric
- A FPGA Prototype Design Emphasis on Low Power Technique