Differences between revisions 6 and 7
Revision 6 as of 2014-03-11 19:53:48
Size: 1894
Editor: AndreDeHon
Comment: session 6
Revision 7 as of 2014-03-11 19:55:52
Size: 2579
Editor: AndreDeHon
Comment: session 7
Deletions are marked like this. Additions are marked like this.
Line 28: Line 28:
  * [[attachment:session7_1.pptx|Wordwidth, Instructions, Looping, and Virtualization: The Role of Sharing in Absolute Energy Minimization]]
  * Theory and Algorithm for Generalized Memory Partitioning in High-Level Synthesis
  * [[attachment:session7_3.pdf|Using High-level Synthesis and Formal Analysis to Predict and Preempt Attacks on Industrial Control Systems]]
  * [[attachment:session7_4.pdf|MPack: Global Memory Optimization for Stream Applications in High-Level Synthesis]]
  * A soft error vulnerability analysis framework for Xilinx FPGAs
  * A Power-Side-Channel Based Digital to Analog Converter for Xilinx FPGAs
  * Accelerating Frequent Item Counting with FPGA

2014 International Symposium on Field-Programmable Gate Arrays

Talk Slides

These are slides from talks given at the 2014 ISFPGA Conference.

FPGA2014 (last edited 2014-03-18 15:41:45 by AndreDeHon)