Differences between revisions 1 and 11 (spanning 10 versions)

International Symposium on Field-Programmable Gate Arrays

Best Papers

2011	CoRAM: an in-fabric memory architecture for FPGA-based computing	ACM DL Link
2012	Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones	ACM DL Link
2013	Polyhedral-Based Data Reuse Optimization for Configurable Computing	ACM DL Link
2014	Optimizing Effective Interconnect Capacitance for FPGA Power Reduction	ACM DL Link
2015	Take the Highway: Design for Embedded NoCs on FPGAs	ACM DL Link
2016	FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures	ACM DL Link
2017	ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA	ACM DL Link
2018	FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering	ACM DL Link
2019	HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing	ACM DL Link
2020	Buffer Placement and Sizing for High-Performance Dataflow Circuits	ACM DL Link

-  ⇤ ← Revision 1 as of 2014-03-09 03:44:22 → 
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  Comment: initial table attempt (add urls on second pass)
+   ← Revision 11 as of 2020-02-27 19:50:28 → ⇥
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  Editor: AndreDeHon
  Comment: add 2019 ACM DL Link
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-= Best Papers from the International Symposium on Field-Programmable Gate Arrays =
+= International Symposium on Field-Programmable Gate Arrays =
= Best Papers =
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-||2011||CoRAM: an in-fabric memory architecture for FPGA-based computing||
||2012||Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones||
||2013||Polyhedral-Based Data Reuse Optimization for Configurable Computing||
||2014||Optimizing Effective Interconnect Capacitance for FPGA Power Reduction||
+||2011||CoRAM: an in-fabric memory architecture for FPGA-based computing||[[http://dl.acm.org/citation.cfm?id=1950435|ACM DL Link]]||
||2012||Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones||[[http://dl.acm.org/citation.cfm?id=2145715|ACM DL Link]]||
||2013||Polyhedral-Based Data Reuse Optimization for Configurable Computing||[[http://dl.acm.org/citation.cfm?id=2435273|ACM DL Link]]||
||2014||Optimizing Effective Interconnect Capacitance for FPGA Power Reduction||[[http://dl.acm.org/citation.cfm?id=2554788|ACM DL Link]]||
||2015||Take the Highway: Design for Embedded NoCs on FPGAs||[[http://dl.acm.org/citation.cfm?id=2689074|ACM DL Link]]||
||2016||FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures||[[http://dl.acm.org/citation.cfm?id=2847280|ACM DL Link]]||
||2017||ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA||[[http://dl.acm.org/citation.cfm?id=3021745|ACM DL Link]]||
||2018||FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering||[[http://dl.acm.org/citation.cfm?id=3174252|ACM DL Link]]||
||2019||HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing ||[[https://dl.acm.org/doi/abs/10.1145/3289602.3293910|ACM DL Link]]||
||2020||Buffer Placement and Sizing for High-Performance Dataflow Circuits||[[https://dl.acm.org/doi/abs/10.1145/3373087.3375314|ACM DL Link]]||