Differences between revisions 6 and 8 (spanning 2 versions)

International Symposium on Field-Programmable Gate Arrays

Best Papers

2011	CoRAM: an in-fabric memory architecture for FPGA-based computing	ACM DL Link
2012	Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones	ACM DL Link
2013	Polyhedral-Based Data Reuse Optimization for Configurable Computing	ACM DL Link
2014	Optimizing Effective Interconnect Capacitance for FPGA Power Reduction	ACM DL Link
2015	Take the Highway: Design for Embedded NoCs on FPGAs	ACM DL Link
2016	FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures	ACM DL Link
2017	ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA	ACM DL Link
2018	FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering	ACM DL Link
2019	HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing

-  ⇤ ← Revision 6 as of 2017-02-26 01:08:24 → 
  Size: 998
  Editor: AndreDeHon
  Comment: add 2017 best paper (not have DL entry, yet)
+   ← Revision 8 as of 2019-02-27 14:41:47 → ⇥
  Size: 1332
  Editor: AndreDeHon
  Comment: add 2019
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-||2017||ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA|| ||
+||2017||ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA||[[http://dl.acm.org/citation.cfm?id=3021745|ACM DL Link]]||
||2018||FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering||[[http://dl.acm.org/citation.cfm?id=3174252|ACM DL Link]]||
||2019||HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing || ||