= ACM Transactions on Reconfigurable Technology and Systems =
= Special Issue on =
= Reconfigurable Components with Source Code =
== Call for Papers ==

As FPGA capacity increases to hold larger designs, our FPGA systems and
designs become more ambitious.  It is increasingly useful to share and
reuse larger blocks and components.  FPGA conferences and journals report
on designs, but few of these are available for community-wide reuse. 
Documenting and packaging designs to be reusable outside of the group in
which they were originally developed is additional hard work that is 
not directly praised and rewarded.  In order to address this need and explore how the
reconfigurable computing community might leverage and guide the use of the ACM
Digital Library for capturing usable design components, this special issues seeks submissions of papers
accompanied by widely usable source code for key reconfigurable building
blocks. 

==== Building Blocks ====
Components of interest include, but are not limited to:

      * arithemetic operators, including floating-point
      * processors
      * network components
      * memory, cache, CAM, and hash structures
      * compression and cryptographic units
      * numeric, signal processing, and video processing kernels

==== Special Requirements ====
To improve portability and reusability
and to make reviewing tractable, for consideration in the special issue,
submissions must conform to the following guidelines:

     * Be clearly marked as available under an open-source license (''e.g.'' [[http://en.wikipedia.org/wiki/BSD_licenses|BSD]], [[http://en.wikipedia.org/wiki/MIT_License|MIT]], [[http://en.wikipedia.org/wiki/GPL|GPL]])
     * Be packaged appropriately as a single tar file that includes at the top level:
             * README file that follows the template attached here: [[attachment:README]]
             * Full source for the building block component 
             * Makefile with two targets
                  *  build--that will build an instantiation of the design from source through bitstream generation for a Xilinx or Altera FPGA.
                  *verify---that will run an included verification suite against the design.
             * Tools necessary to support customization and build by the make flow with source.
      * Must build properly on the [[http://openfabric.org|OpenFabric]] platform. Potential authors are required to obtain a login and test their materials prior to submission.
      * Accompanying paper should include:
            * a table characterizing the resource requirements and performance for the module(s) included
            * a short section  (1--2 pages) describing any customization provided by the modules and the interface signals and requirements.  This should identify the range of reasonable values for customization parameters.

==== Submission Instructions ====
The paper accompanying the submission should be prepared in ACM journal format 
http://www.acm.org/publications/submissions and are limited to 
22 pages. Submissions may be based on works that were previously published in
refereed conferences, in such case the submissions should include 30% new
material and the authors should state clearly how the submissions differs
from and/or expands on the conference paper.  
Submission of both paper and code tar file should be performed on:
http://mc.manuscriptcentral.com/trets

==== Key Dates ====
   * Submission Deadline: October 31, 2014
   * Target for Initial Review Round Completion: March 1, 2015
   * Target for Final Review Round Completion: June 1, 2015
   * Target issue Date: Sep/Oct. 2015

==== Updates ====
Check back at this URL for updates and additional information between now and the deadline.

'''Guest Editors:''' [[http://www.seas.upenn.edu/~andre|Andre DeHon]] and [[http://users.ece.utexas.edu/~derek/|Derek Chiou]]