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| FPT 2015 Conference Slides | <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> <html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> <meta http-equiv="Content-Style-Type" content="text/css" /> <meta name="generator" content="pandoc" /> <title></title> <style type="text/css">code{white-space: pre;}</style> <link rel="stylesheet" href="styles.css" type="text/css" /> </head> <body> <p><meta name="HandheldFriendly" content="true"> <meta name="viewport" content="width=device-width, initial-scale=0.666667, maximum-scale=0.666667, user-scalable=0"> <meta name="viewport" content="width=device-width"></p> <!--- A bit of pain setting up linkcheck -- pip install --user linkchecker --> <!--- Install pandoc via -- brew install pandoc --> <!--- pandoc index.md -s -c styles.css -o index.html --> <header> <h1 id="fpt-2015-slide-content">FPT 2015 Slide Content</h1> </header> <section> <h2 id="keynotes">Keynotes</h2> <p>Andrew Ensor <a href="./ensor_keynote.pdf">Technologies for the Square Kilometre Array project</a><br /> Andre DeHon <a href="./dehon_keynote.pdf">Understanding and Exploiting the Energy advantages of Field-Programmable Technologies</a><br /> Vaughn Betz <a href="./betz_keynote.pptx">The Case for Embedding Networks-on-Chip in FPGA Architectures</a></p> <h2 id="papers">Papers</h2> <p><a href="./ana_carry-chain-vtr.pptx">Improved Carry Chain Mapping for the VTR Flow</a><br /> <a href="./andreas_sql.pdf">A Co-Design Approach for Accelerated SQL Query Processing via FPGA-based Data Filtering</a><br /> <a href="./atasu_leftmost-regex.pdf">Leftmost Longest Regular Expression Matching in Reconfigurable Logic</a><br /> <a href="./bitar_pp-noc.pptx">Packet Processing with a NoC-Enhanced FPGA</a><br /> <a href="./choi_hls-threads.pdf">Resource and Memory Management Techniques for the High-Level Synthesis of Software Threads into Parallel FPGA Hardware</a><br /> <a href="./chow_opencl-pipes.pdf">Exploring Pipe Implementations using an OpenCL Framework for FPGAs</a><br /> <a href="./dehon_space-time.pdf">Energy Minimization in the Time-Space Continuum</a><br /> <a href="./elias_commercial-vs-academic.pdf">Analyzing the Divide between FPGA Academic and Commercial Results</a><br /> <a href="./fraser_knlms.pdf">A Fully Pipelined Kernel Normalised Least Mean Squares Processor For Accelerated Parameter Optimisation</a><br /> <a href="./goeders_debug-hls.pdf">Using Round-Robin Tracepoints to Debug Multithreaded HLS Circuits on FPGAs</a><br /> <a href="./harrison_eqnreason.pdf">Provably Correct Development of Reconfigurable Hardware Designs via Equational Reasoning</a><br /> <a href="./hayden_cell.pdf">Accerated Cell Imaging and Classification on FPGAs for Quantitative-phase Asymmetric-detection Time-stretch Optical Microscopy</a><br /> <a href="./hayden_quickdough.pdf">QuickDough:A Rapid FPGA Loop Accelerator Design Framework Using Soft CGRA Overlay</a><br /> <a href="./jasmina_opencl-streams.pdf">OpenCL Library of Stream Memory Components Targeting FPGAs</a><br /> <a href="./leong_braiding.pdf">Braiding: a Scheme for Resolving Hazards in NORMA</a><br /> <a href="./mengyuan_slam.pptx">An FPGA-based Real-time Simultaneous Localization and Mapping System</a><br /> <a href="./murray_hetris.pdf">HETRIS: Adaptive Floorplanning for Heterogeneous FPGAs</a><br /> <a href="./rodionov_auto-topo.pptx">Automatic FPGA System and Interconnect Construction with Multicast and Customizable Topology</a><br /> <a href="./shuanglong_mcmc.pdf">An Exact MCMC Accelerator Under Custom Precision</a><br /> <a href="./size_random-tree.pptx">Hardware Design of a Fast, Parallel Random Tree Path Planner</a><br /> <a href="./swathi_behav-hls.pptx">Behavioral-Level IP Integration in High-Level Synthesis</a><br /> <a href="./swathi_jit-trace.pptx">JIT Trace-based Verification in High-Level Synthesis</a><br /> <a href="./wang_fault-soc.pdf">An Adaptive Cross-Layer Fault Recovery Solution for Reconfigurable SoCs</a><br /> <a href="./winterstein_custom-cache.pdf">Custom-Sized Caches in Application-Specific Memory Hierarchies</a><br /> <a href="./yubin_hadoop.pptx">A Self-aware Data Compression System on FPGA in Hadoop</a><br /> <a href="./zhang_cordic.pptx">FPGA Implementation of Low-Power and High-PSNR DCT/IDCT Architecture based on Adaptive Recoding CORDIC</a></p> <h4 id="maintained-by-nachiket-kapre">Maintained by Nachiket Kapre</h4> </section> </div> </body> </html> |
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> <html xmlns="http://www.w3.org/1999/xhtml"> <head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8" /> <meta http-equiv="Content-Style-Type" content="text/css" /> <meta name="generator" content="pandoc" /> <title></title> <style type="text/css">code{white-space: pre;}</style> <link rel="stylesheet" href="styles.css" type="text/css" />
</head> <body> <p><meta name="HandheldFriendly" content="true"> <meta name="viewport" content="width=device-width, initial-scale=0.666667, maximum-scale=0.666667, user-scalable=0"> <meta name="viewport" content="width=device-width"></p> <!--- A bit of pain setting up linkcheck -- pip install --user linkchecker --> <!--- Install pandoc via -- brew install pandoc --> <!--- pandoc index.md -s -c styles.css -o index.html --> <header> <h1 id="fpt-2015-slide-content">FPT 2015 Slide Content</h1> </header> <section> <h2 id="keynotes">Keynotes</h2> <p>Andrew Ensor <a href="./ensor_keynote.pdf">Technologies for the Square Kilometre Array project</a><br /> Andre DeHon <a href="./dehon_keynote.pdf">Understanding and Exploiting the Energy advantages of Field-Programmable Technologies</a><br /> Vaughn Betz <a href="./betz_keynote.pptx">The Case for Embedding Networks-on-Chip in FPGA Architectures</a></p> <h2 id="papers">Papers</h2> <p><a href="./ana_carry-chain-vtr.pptx">Improved Carry Chain Mapping for the VTR Flow</a><br /> <a href="./andreas_sql.pdf">A Co-Design Approach for Accelerated SQL Query Processing via FPGA-based Data Filtering</a><br /> <a href="./atasu_leftmost-regex.pdf">Leftmost Longest Regular Expression Matching in Reconfigurable Logic</a><br /> <a href="./bitar_pp-noc.pptx">Packet Processing with a NoC-Enhanced FPGA</a><br /> <a href="./choi_hls-threads.pdf">Resource and Memory Management Techniques for the High-Level Synthesis of Software Threads into Parallel FPGA Hardware</a><br /> <a href="./chow_opencl-pipes.pdf">Exploring Pipe Implementations using an OpenCL Framework for FPGAs</a><br /> <a href="./dehon_space-time.pdf">Energy Minimization in the Time-Space Continuum</a><br /> <a href="./elias_commercial-vs-academic.pdf">Analyzing the Divide between FPGA Academic and Commercial Results</a><br /> <a href="./fraser_knlms.pdf">A Fully Pipelined Kernel Normalised Least Mean Squares Processor For Accelerated Parameter Optimisation</a><br /> <a href="./goeders_debug-hls.pdf">Using Round-Robin Tracepoints to Debug Multithreaded HLS Circuits on FPGAs</a><br /> <a href="./harrison_eqnreason.pdf">Provably Correct Development of Reconfigurable Hardware Designs via Equational Reasoning</a><br /> <a href="./hayden_cell.pdf">Accerated Cell Imaging and Classification on FPGAs for Quantitative-phase Asymmetric-detection Time-stretch Optical Microscopy</a><br /> <a href="./hayden_quickdough.pdf">QuickDough:A Rapid FPGA Loop Accelerator Design Framework Using Soft CGRA Overlay</a><br /> <a href="./jasmina_opencl-streams.pdf">OpenCL Library of Stream Memory Components Targeting FPGAs</a><br /> <a href="./leong_braiding.pdf">Braiding: a Scheme for Resolving Hazards in NORMA</a><br /> <a href="./mengyuan_slam.pptx">An FPGA-based Real-time Simultaneous Localization and Mapping System</a><br /> <a href="./murray_hetris.pdf">HETRIS: Adaptive Floorplanning for Heterogeneous FPGAs</a><br /> <a href="./rodionov_auto-topo.pptx">Automatic FPGA System and Interconnect Construction with Multicast and Customizable Topology</a><br /> <a href="./shuanglong_mcmc.pdf">An Exact MCMC Accelerator Under Custom Precision</a><br /> <a href="./size_random-tree.pptx">Hardware Design of a Fast, Parallel Random Tree Path Planner</a><br /> <a href="./swathi_behav-hls.pptx">Behavioral-Level IP Integration in High-Level Synthesis</a><br /> <a href="./swathi_jit-trace.pptx">JIT Trace-based Verification in High-Level Synthesis</a><br /> <a href="./wang_fault-soc.pdf">An Adaptive Cross-Layer Fault Recovery Solution for Reconfigurable SoCs</a><br /> <a href="./winterstein_custom-cache.pdf">Custom-Sized Caches in Application-Specific Memory Hierarchies</a><br /> <a href="./yubin_hadoop.pptx">A Self-aware Data Compression System on FPGA in Hadoop</a><br /> <a href="./zhang_cordic.pptx">FPGA Implementation of Low-Power and High-PSNR DCT/IDCT Architecture based on Adaptive Recoding CORDIC</a></p> <h4 id="maintained-by-nachiket-kapre">Maintained by Nachiket Kapre</h4> </section> </div> </body> </html>