Badged Artifacts

Starting with FPGA2020, papers with shared artifacts were reviewed for ACM Badging. Creators made these artifacts available to the community for validation and replication and as reusable blocks for others to build upon. These form part of our shared community infrastructure and promote good, repeatable scientific experimentation.

We encourage the community to continue to develop and share artifacts and to help out with the artifact review process.

Venue	Paper	Badges	Artifact Link(s)
FPGA 2020	Flexible Communication Avoiding High-Level Synthesis Matrix Multiplication	Avail, Reuse, Replicate	https://github.com/spcl/gemm_hls
FPGA 2020	Combining Dynamic & Static Scheduling in High-level Synthesis	Avail	Tool Benchmarks Dataset
FPGA 2020	LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree	Function, Replicate	N/A
FPGA 2020	Finding and Understanding Bugs in FPGA Synthesis Tools	Avail, Reuse, Replicate	https://github.com/ymherklotz/verismith
FPGA 2020	Fingerprinting Cloud FPGA Infrastructures	Avail, Reuse	https://caslab.csl.yale.edu/code/cloud-fpga-fingerprinting/
FPGA 2020	Boyi: A Systematic Framework for Automatically Deciding the Best Execution Model for OpenCL Applications on FPGAs	Avail, Function, Replicate	https://zenodo.org/record/3575234#.XwI5Ji2ZOL8

Conference organizers will want to see the report on the FPGA 2020 experience with performing artifact review.